Beginner's Guide to Microcontroller Architectures: ARM Cortex-M vs. RISC-V

Introduction

In the world of embedded systems, microcontrollers (MCUs) are the unsung heroes, powering everything from your smart thermostat to complex industrial machinery. At the heart of every MCU lies its architecture – the fundamental design that dictates how it processes instructions and interacts with its surroundings.
This article will delve into two dominant microcontroller architectures: ARM Cortex-M and RISC-V, comparing their structures, features, and use cases, with a focus on making these complex topics more accessible.

What is a Microcontroller (MCU)?

Before we dive into architectures, let's establish what a microcontroller is. A microcontroller (MCU) is essentially a compact, self-contained computer on a single chip. Unlike a full-fledged computer with separate components, an MCU integrates all necessary parts onto a single chip, making it ideal for managing specific tasks within embedded systems.

A typical MCU contains:

• A CPU core: This is the "brain" of the MCU, responsible for executing instructions (such as read, write, etc.) and performing calculations (such as add, subtract, etc.). For example, the ARM Cortex-M4 is a type of CPU core.
• Flash memory: Non-volatile memory (retains data when the device is turned off) used to store the program code (the instructions the MCU will execute).
• SRAM (Static Random-Access Memory): Volatile memory (data lost when the device is turned off) used for temporary data storage during program execution.
• Peripherals: Dedicated hardware modules that handle specific functions, such as Analogue-to-Digital Converters (ADC) for reading analogue signals, Universal Asynchronous Receiver-Transmitters (UART) for serial communication, and timers for precise timing and event management.
• Clock and power management circuits: Essential components that regulate the MCU's operation and energy consumption.

MCUs are often designed for low power consumption and real-time performance, meaning they can respond to events within a guaranteed timeframe, which is crucial for many embedded applications.

Understanding Computer Architecture Fundamentals

To appreciate the differences between ARM Cortex-M and RISC-V, it's helpful to understand a few core concepts in computer architecture. These terms describe how a processor is designed to execute software instructions.

• Instruction Set Architecture (ISA): At its most fundamental, an ISA is the abstract model of a computer that defines how software communicates with hardware. It's the "vocabulary" and "grammar" that a programmer uses to tell the CPU what to do. An ISA specifies:For example, ARM and RISC-V have different ISAs, but both are based on the RISC (Reduced Instruction Set Computer) philosophy.
  • The set of instructions (e.g., add, subtract, load, store) that the processor can understand and execute.
  • The types of data it can operate on (e.g., integers, floating-point numbers).
  • The registers (small, fast storage locations within the CPU) available for temporary data.
  • The memory addressing modes (how the CPU finds data in memory).
  • How interrupts and exceptions are handled.

What is a pipeline in a CPU?

Just as building a car involves stages, executing an instruction (such as "add these two numbers" or "get data from memory") in a CPU also has several steps or stages. Common stages include:

• Fetch: Getting the instruction from memory.
• Decode: Figuring out what the instruction means and what it needs to do.
• Execute: Performing the actual operation (e.g., addition, subtraction).
• Memory Access: If needed, getting data from or storing data in memory.
• Write Back: Storing the final result in a register or memory.

In a pipelined CPU, different instructions are in different stages of execution simultaneously.

• While instruction A is in the "execute" stage, instruction B can be in the "decode" stage, and instruction C can be in the "fetch" stage.
• This "overlapping" of instructions keeps more parts of the CPU busy at any given time.

So, in essence, a pipeline is like an internal assembly line within the CPU that allows it to process instructions more efficiently by breaking them into steps and working on multiple instructions concurrently.

• RISC vs. CISC: The RISC approach has proven highly effective for embedded systems due to its efficiency and ability to achieve high performance with lower power consumption.
  • RISC (Reduced Instruction Set Computer): Most modern microcontrollers, including those based on ARM and RISC-V, adhere to the RISC philosophy. RISC processors use a small, highly optimised set of simple, fixed-length instructions. Each instruction typically performs a single operation (e.g., load data from memory into a register, then add two registers). This simplicity enables faster instruction decoding and execution, often resulting in more efficient pipelines.
  • CISC (Complex Instruction Set Computer): In contrast, CISC processors use a larger, more complex set of variable-length instructions, where a single instruction might perform multiple operations (e.g., load data, perform arithmetic, and store result, all in one instruction). While potentially requiring fewer instructions for a given task, CISC instructions are more complex to decode and execute.
• Processor Core / Microarchitecture: While the ISA defines what a processor can do, the microarchitecture defines how it does it. This is the actual hardware implementation of an ISA. For example, two different processor cores can implement the same ISA but have vastly different internal designs (e.g., number of pipelines, cache sizes, clock speed) that affect their performance, power consumption, and physical size. When you hear about "ARM Cortex-M4" or "SiFive E31 Core," you're referring to specific microarchitectures that implement their respective ISAs.

Understanding these foundational concepts will help you grasp why certain features exist in the ARM Cortex-M and RISC-V architectures, as well as the implications of their architectural choices.

ARM Cortex-M Series

The ARM Cortex-M family represents a highly successful and widely adopted architecture specifically designed for low-power, deterministic (the same input will always produce the same output) real-time applications. It is currently the most popular MCU architecture in the industry.

A Brief History of ARM and Cortex-M: The roots of ARM (Advanced RISC Machines, originally Acorn RISC Machine) date back to the mid-1980s, when Acorn Computers decided to design its own processor, the ARM1, with a focus on low power consumption and high performance per watt. This foundational principle has carried through to all ARM designs. ARM Limited was officially founded in 1990 as a joint venture between Acorn, Apple, and VLSI Technology. Instead of manufacturing chips themselves, ARM pioneered an "IP business model," licensing its instruction set architectures (ISAs) and processor designs to other companies. This strategy allowed ARM to become ubiquitous in mobile phones (starting with the Nokia 6110 in the mid-90s) and later in the rapidly expanding IoT market.

The Cortex-M series was introduced to address the growing demand for extremely low-power, low-cost microcontroller cores. These processors are distinct from older ARM processors, primarily supporting the Thumb-2 instruction set and featuring a different interrupt handling mechanism and programmer's model, making them very user-friendly for embedded systems development.

Key features of ARM Cortex-M:

• Thumb-2 instruction set: This innovative instruction set combines 16-bit and 32-bit instructions, enabling excellent code density (resulting in memory savings) while maintaining high performance.
• Nested Vectored Interrupt Controller (NVIC): A highly efficient and deterministic interrupt controller that allows for fast and predictable handling of external events, crucial for real-time applications.
• Low-power modes: Integrated features that enable the MCU to significantly reduce power consumption when not actively processing, thereby extending battery life in portable devices.
• System Timer (SysTick): A dedicated 24-bit timer often used to provide a consistent time reference for Real-Time Operating Systems (RTOS).
• Broad vendor support: The ARM Cortex-M architecture is licensed by numerous semiconductor manufacturers, including STMicroelectronics (STM32), NXP, and Texas Instruments (TI), among others, resulting in a vast ecosystem of hardware and development tools.

Cortex-M Variant Overview:

RISC-V

RISC-V (pronounced "risk-five") is a relatively newer contender in the microcontroller space, but one with a rapidly growing impact. It stands out as an open-source Instruction Set Architecture (ISA). Unlike proprietary ISAs like ARM, RISC-V is freely available for anyone to use, modify, and implement without licensing fees or royalties.

A Brief History of RISC-V: RISC-V originated in 2010 as a research project at the University of California, Berkeley, led by computer scientists Krste Asanović, Yunsup Lee, and Andrew Waterman. Their goal was to create a new, open-source ISA that could address the limitations of existing proprietary ISAs and provide a flexible foundation for future processor designs. The project was inspired by the success of open-source software and aimed to bring similar benefits to the field of hardware design. The first version, RV32I, was released in 2011. In 2015, the RISC-V Foundation (now RISC-V International) was established to promote the adoption and standardisation of RISC-V. This open approach has fostered rapid innovation and a growing ecosystem.

Key characteristics and common features in RISC-V MCUs:

• Open licensing: The most significant differentiator is its open-source nature, which eliminates royalties and allows for unprecedented customisation and transparency.
• Modular design: RISC-V is built with a base ISA (e.g., RV32I for 32-bit integer operations) and a set of optional extensions. This modularity allows designers to include only the necessary features, optimising for specific applications (e.g., 'M' for multiplication/division, 'A' for atomic operations, 'F' for floating-point).
• Scalability: Its modularity makes it suitable for a wide range of applications, from very tiny, power-efficient MCUs to high-end processors for data centres.
• Simpler core designs: The base ISA is intentionally small and simple, which can lead to smaller silicon footprints and lower power consumption, making it attractive for academic exploration and ultra-low-power devices.

Examples:

• SiFive E31 Core: A popular commercial RISC-V core used in various microcontrollers, known for its balance of performance and efficiency. The E2 Series (e.g., E21 and E24) serves as a direct successor.
• PULP (Parallel Ultra Low Power) Platform: An open-source hardware and software platform designed for ultra-low-power, high-performance embedded systems using RISC-V.

Key Comparison: ARM Cortex-M vs. RISC-V

To better understand their differences and where each shines, let's compare them across several key features:

Conclusion

Both ARM Cortex-M and RISC-V offer compelling solutions for microcontroller applications, each with distinct advantages. ARM Cortex-M benefits from a long history of refinement, a vast and mature ecosystem, and strong industry support, making it a reliable and accessible choice for many developers and industries. RISC-V, as an open-source ISA, introduces unprecedented flexibility, customisation, and freedom from proprietary constraints, driving innovation and attracting significant attention, especially for specialised or cost-sensitive applications.

As the embedded systems landscape continues to evolve, the interplay between these two architectures will undoubtedly shape the future of microcontrollers, offering developers more diverse and powerful options than ever before.